Journal Papers

[J4] Upper and Lower Bounds on the Computational Complexity of Polar Encoding and Decoding

C. G. Blake and F. R. Kschischang, IEEE Trans. Info. Theory, vol. 65, pp. 5656–5673, Sep. 2019. doi: 10.1109/TIT.2019.2917683

[J8] Corrections to “Low-complexity Concatenated LDPC-Staircase Codes”

M. Barakatain and F. R. Kschischang, J. Lightwave Techn., vol. 37, pp. 1070–1070, Feb. 2019. doi: 10.1109/JLT.2018.2880323

[J10] Energy, Latency, and Reliability Tradeoffs in Coding Circuits

C. G. Blake and F. R. Kschischang, IEEE Trans. Info. Theory, vol. 65, pp. 935–946, Feb. 2019. doi: 10.1109/TIT.2018.2865701

[J11] Low-Complexity Concatenated LDPC-Staircase Codes

M. Barakatain and F. R. Kschischang, J. Lightwave Techn., vol. 36, pp. 2443–2449, Jun. 2018. doi: 10.1109/JLT.2018.2812738

[J12] Modeling and Energy Optimization of LDPC Decoder Circuits with Timing Violations

F. Leduc-Primeau, F. R. Kschischang, and W. J. Gross, IEEE Trans. Commun., vol. 66, pp. 932–946, Mar. 2018. doi: 10.1109/TCOMM.2017.2778247

[J15] Low-Complexity Soft-Decision Concatenated LDGM-Staircase FEC for High-Bit-Rate Fiber-Optic Communication

L. M. Zhang and F. R. Kschischang, J. Lightwave Techn., vol. 35, pp. 3991–3999, Jun. 2017. doi: 10.1109/JLT.2017.2716373

[J16] On the VLSI Energy Complexity of LDPC Decoder Circuits

C. G. Blake and F. R. Kschischang, IEEE Trans. Info. Theory, vol. 63, pp. 2781–2795, May 2017. doi: 10.1109/TIT.2017.2673805

[J36] Multi-Edge-Type Low-Density Parity-Check Codes for Bandwidth-Efficient Modulation

L. Zhang and F. R. Kschischang, IEEE Trans. Commun., vol. 61, pp. 43–52, Jan. 2013. doi: 10.1109/TCOMM.2012.100512.120006

[J41] A Simplified Successive-Cancellation Decoder for Polar Codes

A. Alamdar-Yazdi and F. R. Kschischang, IEEE Commun. Letters, vol. 15, pp. 1378–1380, Dec. 2011. doi: 10.1109/LCOMM.2011.101811.111480

[J48] Design of Irregular LDPC Codes with Optimized Performance-Complexity Tradeoff

B. P. Smith, M. Ardakani, W. Yu, and F. R. Kschischang, IEEE Trans. Commun., vol. 58, pp. 489–499, Feb. 2010. doi: 10.1109/TCOMM.2010.02.080193

[J54] Power Reduction Techniques for LDPC Decoders

A. Darabiha, A. C. Carusone, and F. R. Kschischang, IEEE J. Solid State Circuits, vol. 43, pp. 1835–1845, Aug. 2008. doi: 10.1109/JSSC.2008.925402

[J56] Block-Interlaced LDPC Decoders with Reduced Interconnect Complexity

A. Darabiha, A. C. Carusone, and F. R. Kschischang, IEEE Trans. Circuits and Sys. II, vol. 55, pp. 74–78, Jan. 2008. doi: 10.1109/TCSII.2007.905328

[J58] A Partial Ordering of General Finite-State Markov Channels under LDPC Decoding

A. W. Eckford and F. R. Kschischang, IEEE Trans. Info. Theory, vol. 53, pp. 2072–2087, Jun. 2007. doi: 10.1109/TIT.2007.896877

[J61] On Designing Good LDPC Codes for Markov Channels

A. W. Eckford, F. R. Kschischang, and S. Pasupathy, IEEE Trans. Info. Theory, vol. 53, pp. 5–21, Jan. 2007. doi: 10.1109/TIT.2006.887467

[J63] Gear-shift Decoding

M. Ardakani and F. R. Kschischang, IEEE Trans. Commun., vol. 54, pp. 1235–1242, Jul. 2006. doi: 10.1109/TCOMM.2006.876885

[J67] Near-Capacity Coding for Discrete Multitone Systems with Impulse Noise

M. Ardakani, F. R. Kschischang, and W. Yu, EURASIP J. on Applied Signal Proc., vol. 2006, pp. 1–10, 2006, Article id=098738. doi: 10.1155/ASP/2006/98738

[J68] Analysis of Low-density Parity-check Codes for the Gilbert-Elliott Channel

A. W. Eckford, F. R. Kschischang, and S. Pasupathy, IEEE Trans. Info. Theory, vol. 51, pp. 3872–3889, Nov. 2005. doi: 10.1109/TIT.2005.856934

[J69] Properties of Optimum Binary Message-passing Decoders

M. Ardakani and F. R. Kschischang, IEEE Trans. Info. Theory, vol. 51, pp. 3658–3665, Oct. 2005. doi: 10.1109/TIT.2005.855611

[J73] EXIT-chart Properties of the Highest-rate LDPC Code with Desired Convergence Behavior

M. Ardakani, T. H. Chan, and F. R. Kschischang, IEEE Commun. Letters, vol. 9, pp. 52–54, Jan. 2005. doi: 10.1109/LCOMM.2005.01003

[J75] A More Accurate One-dimensional Analysis and Design of Irregular LDPC Codes

M. Ardakani and F. R. Kschischang, IEEE Trans. Commun., vol. 52, pp. 2106–2114, Dec. 2004. doi: 10.1109/TCOMM.2004.838718

[J76] Near-capacity Coding in Multicarrier Modulation Systems

M. Ardakani, T. Esmailian, and F. R. Kschischang, IEEE Trans. Commun., vol. 52, pp. 1880–1889, Nov. 2004. doi: 10.1109/TCOMM.2004.836560

[J86] Gallager Codes for CDMA Applications I: Generalizations, Constructions and Performance Bounds

V. Sorokine, F. R. Kschischang, and S. Pasupathy, IEEE Trans. Commun., vol. 48, pp. 1660–1668, Oct. 2000. doi: 10.1109/26.871391

[J87] Gallager Codes for CDMA Applications II: Implementations, Complexity and System Capacity

V. Sorokine, F. R. Kschischang, and S. Pasupathy, IEEE Trans. Commun., vol. 48, pp. 1818–1828, Nov. 2000. doi: 10.1109/26.886472

[J90] A Simple Taboo-Based Soft-Decision Decoding Algorithm for Expander Codes

A. M. Chan and F. R. Kschischang, IEEE Commun. Letters, vol. 2, pp. 183–185, Jul. 1998. doi: 10.1109/4234.703905

[J92] Early Detection and Trellis Splicing: Reduced-Complexity Soft Iterative Decoding

B. J. Frey and F. R. Kschischang, IEEE J. Selected Areas in Commun., vol. 16, pp. 153–159, Feb. 1998. doi: 10.1109/49.661104

Conference Papers

[C9] Energy Complexity of Polar Codes

C. G. Blake and F. R. Kschischang, in Proc. IEEE Int. Symp. on Info. Theory, Barcelona, Spain, Jul. 10, 2016–Jul. 15, 2016, pp. 810–814. doi: 10.1109/ISIT.2016.7541411

[C13] Scaling Rules for the Energy of Decoder Circuits

C. G. Blake and F. R. Kschischang, in Proc. IEEE Int. Symp. on Info. Theory, Hong Kong, Jun. 14, 2015–Jun. 19, 2015, pp. 1437–1441, selected for semi-plenary presentation. doi: 10.1109/ISIT.2015.7282693

[C25] Energy of Decoding Algorithms

C. Blake and F. R. Kschischang, in Proc. 13th Canadian Workshop on Information Theory, Toronto, ON, Jun. 18, 2013–Jun. 21, 2013, pp. 1–5. doi: 10.1109/CWIT.2013.6621582

[C30] Design of Multi-edge-type LDPC Codes for High-order Coded Modulation

L. Zhang and F. R. Kschischang, in Proc. 12th Canadian Workshop on Information Theory, University of British Columbia—Okanagan, Kelowna, BC, May 17, 2011–May 20, 2011, pp. 5–8. doi: 10.1109/CWIT.2011.5872111

[C62] A Bit-Serial Approximate Min-Sum LDPC Decoder and FPGA Implementation

A. Darabiha, A. Chan Carusone, and F. R. Kschischang, in Proc. 2006 IEEE Int. Symp. Circuits and Syst., Kos, Greece, May 2006. doi: 10.1109/ISCAS.2006.1692544

[C63] Low-Density Parity-Check Codes for Discretized Min-Sum Decoding

B. Smith, F. R. Kschischang, and W. Yu, in Proc. 23rd Biennial Symp. Commun., Queen’s University, Kingston, ON, May 2006, pp. 14–17. doi: 10.1109/BSC.2006.1644559

[C64] Incremental Redundancy via Check Splitting

M. Good and F. R. Kschischang, in Proc. 23rd Biennial Symp. Commun., Queen’s University, Kingston, ON, May 2006, pp. 55–58. doi: 10.1109/BSC.2006.1644569

[C68] Complexity-Optimized Low-Density Parity-Check Codes

W. Yu, M. Ardakani, B. Smith, and F. R. Kschischang, in Proc. 43rd Annual Allerton Conf. on Commun., Control and Computing, Allerton House, Monticello, IL, Sep. 28, 2005–Sep. 30, 2005.

[C69] Complexity-Optimized Low-Density Parity-Check Codes for Gallager Decoding Algorithm B

W. Yu, M. Ardakani, B. Smith, and F. R. Kschischang, in Proc. IEEE Int. Symp. on Info. Theory, Adelaide, Australia, Sep. 4, 2005–Sep. 9, 2005. doi: 10.1109/ISIT.2005.1523591

[C70] Finite Geometry Low-Density Parity-Check Codes for Channels with Stuck-at Defects

G.-C. Zhu, W. Yu, and F. R. Kschischang, in Proc. 9th Canadian Workshop on Information Theory, McGill University, Montreal, QC, Jun. 5, 2005–Jun. 8, 2005.

[C71] Multi-Gbit/sec Low-Density Parity-Check Decoders with Reduced Interconnect Complexity

A. Darabiha, A. Chan Carusone, and F. R. Kschischang, in IEEE Int. Symp. Circuits and Systems, Kobe, Japan, May 2005, pp. 5194–5197. doi: 10.1109/ISCAS.2005.1465805

[C72] Gear-shift Decoding for Algorithms with Varying Complexity

M. Ardakani and F. R. Kschischang, in Proc. IEEE Int. Conf. Commun, Seoul, Korea, May 2005, pp. 500–504. doi: 10.1109/ICC.2005.1494402

[C73] Low-density Parity-check Coding for Impulse Noise Correction on Power-line Channels

M. Ardakani, F. R. Kschischang, and W. Yu, in Proc. 2005 Int. Symp. on Power Line Communications and its Applns, Apr. 2005, pp. 90–94. doi: 10.1109/ISPLC.2005.1430472

[C77] Designing Good LDPC Codes for Markov-Modulated Channels

A. W. Eckford, F. R. Kschischang, and S. Pasupathy, in Proc. IEEE Int. Symp. on Info. Theory, Chicago, IL, Jun. 27, 2004–Jul. 2, 2004, p. 373. doi: 10.1109/ISIT.2004.1365410

[C83] Low-Density Parity-Check Codes for the Gilbert-Elliott Channel

A. W. Eckford and F. R. Kschischang, in Proc. 41st Annual Allerton Conf. on Commun., Control and Computing, Allerton House, Monticello, IL, Oct. 1, 2003–Oct. 3, 2003.

[C88] On Partial Ordering of Markov-modulated Channels under LDPC Decoding

A. W. Eckford, F. R. Kschischang, and S. Pasupathy, in Proc. IEEE Int. Symp. on Info. Theory, Yokohama, Japan, Jun. 29, 2003–Jul. 4, 2003, p. 295. doi: 10.1109/ISIT.2003.1228310

[C89] Properties of EXIT Charts for One-dimensional LDPC Decoding Schemes

M. Ardakani, T. H. Chan, and F. R. Kschischang, in Proc. 8th Canadian Workshop on Information Theory, University of Waterloo, Waterloo, ON, May 18, 2003–May 21, 2003.

[C92] Designing Very Good Low-Density Parity-Check Codes for the Gilbert-Elliott Channel

A. W. Eckford, F. R. Kschischang, and S. Pasupathy, in Proc. 8th Canadian Workshop on Information Theory, University of Waterloo, Waterloo, ON, May 18, 2003–May 21, 2003.

[C96] Characterizing the Gilbert-Elliott Parameter Space under LDPC Decoding

A. W. Eckford, F. R. Kschischang, and S. Pasupathy, in Proc. 40th Annual Allerton Conf. on Commun., Control and Computing, Allerton House, Monticello, IL, Oct. 2, 2002–Oct. 4, 2002.

[C98] Designing Irregular LPDC codes using EXIT charts based on message error rate

M. Ardakani and F. R. Kschischang, in Proc. IEEE Int. Symp. on Info. Theory, Lausanne, Switzerland, Jun. 30, 2002–Jul. 5, 2002, p. 454. doi: 10.1109/ISIT.2002.1023726

[C101] Gear-Shift Decoding

M. Ardakani and F. R. Kschischang, in Proc. 21st Biennial Symp. Commun., Queen’s University, Kingston, ON, Jun. 2002.

[C105] Analysis of LDPC Codes in Channels with Memory

A. W. Eckford, F. R. Kschischang, and S. Pasupathy, in Proc. 21st Biennial Symp. Commun., Queen’s University, Kingston, ON, Jun. 2002.

[C112] Decoder-First Code Design

E. Boutillon, J. Castura, and F. R. Kschischang, in Proc. 2nd Int. Symp. on Turbo Codes and Applications, Brest, France, Sep. 2000, pp. 459–462.

[C114] Performance-Complexity Considerations for Practical LDPC Decoding

J. Castura and F. R. Kschischang, in Proc. 20th Biennial Symp. Commun., Queen’s University, Kingston, ON, May 2000.

[C118] A Capacity-Approaching Hybrid ARQ Scheme using Turbo Codes

R. Mantha and F. R. Kschischang, in Proc. IEEE Global Telecommun. Conf., Rio de Janeiro, Brazil, Dec. 1999, pp. 2341–2345. doi: 10.1109/GLOCOM.1999.831721

[C119] Hybrid ARQ Schemes using Turbo Codes and Low Density Parity Check Codes

R. Mantha and F. R. Kschischang, in Proc. 6th Canadian Workshop on Information Theory, Kingston, ON, Jun. 15, 1999–Jun. 18, 1999, pp. 25–28.

[C125] Gallager Codes for CDMA Applications: Generalizations, Constructions and Performance

V. Sorokine, F. R. Kschischang, and S. Pasupathy, in Proc. Summer 1998 IEEE Inform. Theory Workshop, Killarney, Ireland, Jun. 1998, pp. 8–9. doi: 10.1109/ITW.1998.706373

[C127] Decoding Turbo Codes by Multibit Probability Propagation

P. P. Sauvé and F. R. Kschischang, in Proc. 19th Biennial Symp. Commun., Queen’s University, Kingston, ON, Jun. 1998, pp. 89–93.

[C130] Concurrent Turbo-Decoding

B. J. Frey, F. R. Kschischang, and P. G. Gulak, in Proc. IEEE Int. Symp. on Info. Theory, Ulm, Germany, Jun. 29, 1997–Jul. 4, 1997, p. 431. doi: 10.1109/ISIT.1997.613368

[C131] Applications of Gallager Codes in Wireless CDMA

V. Sorokine, F. R. Kschischang, and S. Pasupathy, in Proc. 5th Canadian Workshop on Information Theory, University of Toronto, Toronto, ON, Jun. 3, 1997–Jun. 6, 1997, pp. 17–20.

[C134] Speeding up Turbo-decoding by Trellis Splicing

B. J. Frey, F. R. Kschischang, and P. G. Gulak, in Proc. Int. Workshop on Turbo Codes, Lund, Sweden, Aug. 1996.

Updated: Mon Jan 20 17:04:23 EST 2020